{"id":113578,"date":"2025-09-10T04:59:54","date_gmt":"2025-09-10T04:59:54","guid":{"rendered":"https:\/\/www.whitehattoolbox.com\/jobs\/mts-silicon-design-engineer-19\/"},"modified":"2025-09-10T04:59:54","modified_gmt":"2025-09-10T04:59:54","slug":"mts-silicon-design-engineer-19","status":"publish","type":"post","link":"https:\/\/www.whitehattoolbox.com\/jobs\/mts-silicon-design-engineer-19\/","title":{"rendered":"MTS Silicon Design Engineer"},"content":{"rendered":"

Job Description:<\/b><\/span>WHAT YOU DO AT AMD CHANGES EVERYTHING<\/span>We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences \u2013 the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world\u2019s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.<\/span>AMD together we advance_<\/span>SoC Verification Engineer<\/span>THE ROLE:<\/b><\/span>The focus of this role is to plan, build, and execute the verification of new and existing features for AMD\u2019s graphics processor IP, resulting in no bugs in the final design.<\/span>THE PERSON:<\/b><\/span>You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites\/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.<\/span>KEY RESPONSIBILITIES:<\/b><\/span>\u00b7 Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified<\/span>\u00b7 Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases<\/span>\u00b7 Estimate the time required to write the new feature tests and any required changes to the test environment<\/span>\u00b7 Build the directed and random verification tests<\/span>\u00b7 Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues<\/span>\u00b7 Review functional and code coverage metrics \u2013 modify or add tests or constrain random tests to meet the coverage requirements<\/span>PREFERRED EXPERIENCE:<\/b><\/span>\u00b7 Proficient in IP\/Sub-System\/SOC level ASIC verification<\/span>\u00b7 Proficient in debugging firmware and RTL code using simulation tools<\/span>\u00b7 Proficient in using UVM testbenches and working in Linux and Windows environments<\/span>\u00b7 Experienced with Verilog, System Verilog, C, and C++<\/span>\u00b7 Processor Micro-Architecture concepts \u2013 Reset\/Boot-flow\/Cache Coherency\/Interrupt flows knowledge<\/span>\u00b7 Developing UVM based verification frameworks and testbenches, processes and flows<\/span>\u00b7 Automating workflows in a distributed compute environment.<\/span>\u00b7 Exposure to simulation profile, efficiency improvement, acceleration, HLS tools\/process<\/span>\u00b7 Strong background in the C++ language, preferably on Linux with exposure to Windows platform<\/span>\u00b7 Good understanding and hands-on experience in the UVM concepts and SystemVerilog language<\/span>\u00b7 Good working knowledge of SystemC and TLM with some related experience.<\/span>\u00b7 Scripting language experience: Perl, Ruby, Makefile, shell preferred.<\/span>\u00b7 Exposure to leadership or mentorship is an asset<\/span>\u00b7 Desirable assets with prior exposure to video codec system or other multimedia solutions.<\/span>ACADEMIC CREDENTIALS: <\/p>\n